1. Field of the Invention
This invention relates in general to a method for forming integrated circuit devices, and more specifically relates to a method for fabricating a transistor having a T-shape gate structure.
2. Description of Related Art
Generally, a standard process for forming a transistor comprising forming a polysilicon gate, implanting ions to form source/drain regions and forming a gate silicide on the polysilicon gate. As the semiconductor technology trends to a higher integration, the device size significantly reduces. When the device size decreases the gate length thus reduces, and he resistance of the gate increases because the gate silicide has the same length as the underlying polysilicon gate. The increased resistance results in slowing down the speed and performance of the device due to RC delay.
Conventionally, one of the solutions to solve the increased resistance problem, such as disclosed by U.S. Pat. No. 6,096,590 issued to Chan et al., a metal gate longer than the polysilicon gate is formed over the polysilicon; namely a T-shape gate is formed to reduce the resistance of the gate. However, this procedure requires performing many steps of photolithography and highly alignment for forming the polysilicon gate first. Therefore, the process becomes complex and hard to control the produce yield rate, and furthermore manufacturing cost thus increases.
According to the foregoing description, this invention is to provide a method for fabricating a transistor. First, a substrate is provided, which a sacrificial layer, a metal layer and an insulating layer in turn formed thereon. A patterned photoresist layer is formed over the insulating layer used for defining a first gate window. A portion of the insulating layer and the metal layer are removed by etching for example using the patterned photoresist layer as a mask to formed the first gate window, and a portion of the sacrificial layer is exposed to the first gate window. The photoresist layer is laterally removed, and using the remained photoresist as a mask the remained insulating layer is also laterally removed to form a second gate window. The width of second gate window is greater than the width of the first gate window, and both the first and the second gate windows form a T-shape gate window.
A thermal process is performed and then source and drain regions are formed by alloying the metal layer and the sacrificial layer under the metal layer. After the sacrificial layer within the T-shape gate window is removed, a gate dielectric layer is formed over the remained insulating layer and the source and drain regions. A gate electrode can therefore be formed within the T-shape gate window.
Another embodiment of this invention, it is to provide a method for fabricating a T-shape opening. First, substrate having a material layer thereon is provided. A patterned photoresist layer is then formed over the material layer for defining a first opening. A portion of material layer is removed using the patterned photoresist layer as a mask to formed the first gate window. The photoresist layer is further laterally removed by etching for example. Using the remained photoresist as a mask, the remained material layer is also removed by such as etching to form a second opening. As a result, the width of second opening is greater than the width of the first opening, and the first and the second gate opening form a T-shape opening.
Advantageously, only one photoresist layer is required to form a T-shape gate window and then form a T-shape gate electrode within the T-shape gate window, or to form a T-shape opening, via or hole in a material layer. No additional photoresist layer and photolithography step is required and therefore the manufacturing process is simplified and manufacturing cost reduces.